Motorola 68881

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The Motorola 68881 and Motorola 68882 were floating-point coprocessor chip that were used in some computer systems in conjunction with the 68020 or 68030 CPU. The addition of one of these chips added substantial cost to the computer, but added a floating point unit that could rapidly perform floating point math calculations. At the time, this was useful mostly for scientific and mathematical software.


The 68020 and 68030 CPUs were designed with the separate 68881 chip in mind. Their instruction sets reserved the "F-line" instructions — that is, all opcodes beginning with the hexadecimal digit "F" were "traps" which would throw an interrupt, handing control to the computer's operating system. If a 68881 is present in the system, the CPU would allow it to execute the instruction. If not, the OS would either call an FPU emulator to execute the instruction using 68020 integer-based software code, or would return an error code to the program.


The 68881 had eight 80-bit data registers. It allowed seven different modes of numeric representation, including single-precision, double-precision, and extended-precision, as defined by the IEEE floating-point standard, IEEE 754. It was designed specifically for floating-point math and was not a general-purpose CPU. For example, when an instruction required any address calculations, the main CPU would handle them before the 68881 took control.

The CPU/FPU pair were...
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