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XDR2 DRAM is a type of Dynamic Random Access Memory that is offered by Rambus. It was announced on July 7, 2005 and the specification for which was released on March 26, 2008. Rambus has designed XDR2 as an evolution of, and the successor to, XDR DRAM.

XDR2 DRAM is intended for use in high-end graphics cards and networking equipment.

As a fabless semiconductor company, Rambus only produces a design; it must make deals with memory manufacturers to produce XDR2 DRAM chips, and there has been a notable lack of interest in doing so.

Changes from XDR DRAM


In addition to a higher clock rate (up to 800 MHz), the XDR2 differential data lines transfer data at 16 times the system clock rate, transferring 16 bits per pin per clock cycle. This "Hexadecimal Data Rate" is twice XDR's 8× multiplier. The basic burst size has also doubled.

Unlike XDR, memory commands are also transmitted over differential point-to-point links at this high data rate. The command bus varies between 1 and 4 bits wide. Even though each bit requires 2 wires, this is still less than the 12-wire XDR request bus, but it must grow with the number of chips addressed.


There is a basic limit to how frequently data can be fetched from the currently open row. This is typically 200 MHz for standard SDRAM and 400–600 MHz for high-performance graphics memory. Increasing interface speeds require fetching...
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